SN74AUP1G17DCKR

具有施密特触发输入的单路 0.8V 至 3.6V 低功耗缓冲器

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1 Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model (A114-B, Class II)

– 1000-V Charged-Device Model (C101)

• Available in the Texas Instruments NanoStar™ Package

• Low Static-Power Consumption (ICC = 0.9 µA Maximum)

• Low Dynamic-Power Consumption (Cpd = 4.4 pF Typical at 3.3 V)

• Low Input Capacitance (Ci = 1.5 pF Typical)

• Low Noise

– Overshoot and Undershoot <10% of VCC

• Ioff Supports Partial-Power-Down Mode Operation

• Includes Schmitt-Trigger Inputs

• Wide Operating VCC Range of 0.8 V to 3.6 V

• Optimized for 3.3-V Operation

• 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation

• tpd = 5.1 ns Maximum at 3.3 V

• Suitable for Point-to-Point Applications

2 Applications

• Grid Infrastructure

• PC & Notebooks

• Tablets

• Factory Automation & Control

• Gaming

• Server

3 Description

The AUP family of devices is TI s premier solution to the industry s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life. This product also maintains excellent signal integrity (see AUP – The LowestPower Family and Excellent Signal Integrity)

This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.