SN74AUC1G125DCKR

具有三态输出的单路 0.8V 至 2.7V 高速缓冲器

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1 Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESDProtection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

• Available in the Texas Instruments NanoFree™ Package

• Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation

• Ioff Supports Partial Power Down Mode and Back Drive Protection

• Sub-1-V Operable

• Maxtpd of 2.5 ns at 1.8 V

• LowPower Consumption, 10-µA Maximum ICC

• ±8-mA Output Drive at 1.8 V

2 Applications

• AVReceiver

• Audio Dock: Portable

• Blu-Ray Player and Home Theater

• Embedded PC

• MP3Player/Recorder (Portable Audio)

• Personal Digital Assistant (PDA)

• Power: Telecom/Server AC/DC Supply: Single Controller: Analog and Digital

• Solid State Drive (SSD): Client and Enterprise

• TV:LCD/Digital and High-Definition (HDTV)

• Tablet: Enterprise

• Video Analytics: Server

• Wireless Headset, Keyboard, and Mouse

3 Description

This bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC1G125 device is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.