SN74HC165N 8 位并行负载移位寄存器

1 Features

• WideOperatingVoltageRangeof2Vto6V

• OutputsCanDriveUpto10LSTTLLoads

• LowPowerConsumption,80-µAMaximumICC

• Typical tpd=13ns

• ±4-mAOutputDriveat5V

• LowInputCurrentof1µAMaximum

• ComplementaryOutputs

• DirectOverridingLoad(Data)Inputs

• GatedClockInputs

• Parallel-to-SerialDataConversion

• OnProductsCompliant toMIL-PRF-38535,AllParametersAreTestedUnlessOtherwiseNoted.OnAllOtherProducts,Production ProcessingDoesNotNecessarilyIncludeTesting ofAllParameters.

2 Applications

• ProgramableLogicControllers

• Appliances

• VideoDisplaySystems

• OutputExpander

• Keyboards

3 Description

TheSNx4HC165devicesare8-bit parallel-loadshift registers that,whenclocked, shift thedata towarda serial (QH)output.Parallel-inaccesstoeachstageis providedbyeight individual direct data(A−H) inputs that are enabled by a low level at the shift/load (SH/LD) input.TheSNx4HC165devicesalsofeature a clock-inhibit (CLK INH) function and a complementaryserial (QH)output.

Clocking isaccomplishedbya low-to-high transition of theclock(CLK) inputwhileSH/LDisheldhighand CLKINHisheldlow.ThefunctionsofCLKandCLK INHare interchangeable.Becausea lowCLKanda low-to-high transition of CLK INHalso accomplish clocking,CLKINHmustbechangedtothehighlevel onlywhileCLK ishigh. Parallel loading is inhibited whenSH/LD isheldhigh.WhileSH/LD is low, the parallel inputs to the register are enabled  independentlyof the levelsof theCLK,CLKINH,or serial (SER) inputs.