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首页设计与方案SN74AUC1G02YZPR_TI(德州仪器)中文资料_英文资料_价格_PDF手册
SN74AUC1G02YZPR_TI(德州仪器)中文资料_英文资料_价格_PDF手册
2024-09-06 11:49:19
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SN74AUC1G02YZPR

单路 2 输入、0.8V 至 2.7V 高速或非门

 

 

FEATURES

 

• Available in the Texas Instruments NanoFree™ Package

• Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation

• Ioff Supports Partial-Power-Down Mode Operation

• Sub-1-V Operable

• Maxtpd of 2.4 ns at 1.8 V

• LowPowerConsumption, 10-µA Max ICC

• ±8-mAOutput Drive at 1.8 V

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESDProtection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

 

 

DESCRIPTION/ORDERING INFORMATION

 

This single 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

 

The SN74AUC1G02 performs the Boolean function Y = A + B or Y = A•B in positive logic.

 

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

 

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

 

For more information about AUC Little Logic devices, please refer to the TI application report, Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.


SN74AUC1G02YZPR 单路 2 输入、0.8V 至 2.7V 高速或非门