SN74AUP1G240DSFR

具有三态输出的单路 0.8V 至 3.6V 低功耗反相器

1 Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model (A114-B, Class II)

– 1000-V Charged-Device Model (C101)

• Available in the Texas Instruments NanoStar™ Package

• Low Static-Power Consumption

– ICC = 0.9 µA Maximum

• Low Dynamic-Power Consumption

– Cpd = 4.2 pF at 3.3 V Typical

• Low Input Capacitance

– CI = 1.5 pF Typical

• Low Noise – Overshoot and Undershoot <10% of VCC

• Input-Disable Feature Allows Floating Input Conditions

• Ioff Supports Partial Power-Down-Mode Operation

• Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input

• Wide Operating VCC Range of 0.8 V to 3.6 V

• Optimized for 3.3-V Operation

• 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation

• tpd = 4.7 ns Maximum at 3.3 V

• Suitable for Point-to-Point Applications

2 Applications

• Grid infrastructure

• Telecom Infrastructure

• Medical, Healthcare, and Fitness

• Factory Automation and Control

• Printers and Other Peripherals

3 Description

The AUP family is TI's premier solution to the industry's low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see AUP – The LowestPower Family ).

This buffer/driver is a single line driver with a 3-state output. The output is disabled when the outputenable (OE) input is high. This device has the inputdisable feature, which allows floating input signals.

To assure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.